1. Field of the Invention
This invention relates generally to semiconductor structures, and more particularly, to MOS and Schottky gate transistors.
2. Discussion of the Related Art
In current semiconductor technology, large area die typically include a number of logic units, each including a large number of closely packed MOS transistors connected within the logic unit by short interconnects. Additionally, interconnects of different lengths connect the logic units. Typically, some of the interconnects connecting the logic units are quite long, i.e., for example more than 50 microns in length. The increased capacitances and resistances accompanying long interconnects increase signal delay and consume power. In order to drive large interconnect capacitances and resistances, MOS transistors with large drive currents are typically provided. However, MOS transistors with large drive currents also have large off-state leakage. Schottky gate transistors have small off-state leakage and small gate capacitance, which provides extremely fast switching thereof with very low power being consumed. However, Schottky gate transistors, while capable of providing sufficient drive current for short interconnects, have insufficient drive currents for long interconnects.
Therefore, what is needed is a semiconductor structure which takes advantage of the characteristics of the above-described MOS and Schottky gate transistors, and a method of fabricating this structure.
In the present method of fabricating a semiconductor structure, a substrate comprising silicon is provided. An insulating layer is provided on the substrate, and a first structure is provided on the insulating layer, the first structure comprising a dielectric on the insulating layer. A second structure is provided on the insulating layer, the second structure comprising polysilicon on the insulating layer and a dielectric on the polysilicon. Source and drain regions are formed in the silicon of the substrate using the first and second structures and as masks. The dielectric of the first structure is removed, the dielectric of the second structure is removed to expose the polysilicon, and a portion of the insulating layer is removed to expose portions of the silicon of the substrate. Silicide is then grown on exposed portions of silicon and the polysilicon.
The present semiconductor structure comprises a semiconductor substrate, a first transistor having a source and a drain in the substrate and a Schottky gate, and a second transistor having a source and a drain in the substrate, a gate insulator on the substrate, and a gate on the gate insulator.
The present invention is better understood upon consideration of the detailed description below, in conjunction with the accompanying drawings. As will become readily apparent to those skilled in the art from the following description, there is shown and described an embodiment of this invention simply by way of the illustration of the best mode to carry out the invention. As will be realized, the invention is capable of other embodiments and its several details are capable of modifications and various obvious aspects, all without departing from the scope of the invention. Accordingly, the drawings and detailed description will be regarded as illustrative in nature and not as restrictive.